PicoRV32 RTL-to-GDS (FluxEDA, 350 MHz): leaderboard

This benchmark asks a coding agent to take a PicoRV32 RISC-V core from RTL to a finished layout with commercial chip-design tools, covering synthesis, floorplan and power, placement, clock tree synthesis, routing and engineering change order on a 55-nm setup. This board runs FluxEDA, a structured chip-design agent at a loose 350 MHz clock target. The score combines stage completion and design quality on a 0-100 scale.

Metric: End-to-end design score (0-100) for the PicoRV32 RTL-to-GDS flow the agent drives through commercial EDA tools, covering synthesis, floorplan and power, placement, clock tree synthesis, routing, engineering change order and final reports on a commercial 55-nm setup at a loose 350 MHz clock target; the FluxEDA agent, a structured EDA-specific scaffold; one run per cell. Source: arxiv.org. Saturation forecast: Rough model projection: around 2026. 4 models tracked.

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Interactive version: theaggregate.ai/benchmark?slug=picorv32-rtl-to-gds-fluxeda-350-mhz · How It Works · Data refreshed daily, snapshot 2026-11-13.