Bench4HLS: leaderboard
High-level synthesis code benchmark (Bench4HLS, Khan, Azar and Kamali, University of Central Florida, 2026): 170 hardware designs, from small kernels to accelerators, each given as a natural-language description; the model must write synthesizable, pragma-annotated HLS C++. Each candidate is compiled, simulated against a manually validated testbench and synthesized with Vitis HLS for a Xilinx Artix-7 FPGA. The score is pass@1 in percent over the 170 designs for passing all three stages; higher is better.
Metric: Synthesis pass@1 (% of 170 designs whose first candidate compiles, passes testbench simulation and synthesizes in Vitis HLS 2024.1). Source: arxiv.org. Saturation forecast: Around February 2027. 4 models tracked.
Top models
| # | Model | Score | Overall rank |
|---|---|---|---|
| 1 | GPT-5 | 50 | #163 |
| 2 | Llama 3.3 70B Instruct [4bit] | 44.12 | #1221 |
No result here: #1 Claude Fable 5.2, #2 Gemini 4 Carbon, #5 Claude Opus 5.5.
Interactive version: theaggregate.ai/benchmark?slug=bench4hls · How It Works · Data refreshed daily, snapshot 2026-11-12.